Principal RTL Design Engineer

Bachelor's or Master’s degree or equivalent experience in Electronics/Electrical Engineering with 15+ years of RTL design experience.

Hands on experience in RTL coding, debugging, verification, synthesis and timing closure.

Strong experience in ARM based SOC architecture and ASIC design flow AMBA protocols (AXI, AHB, APB), clock/reset domains and memory sub-systems.

with EDA tools for synthesis, LINT, CDC, RDC and timing analysis.

Familiarity with formal verification techniques, static/dynamic power checks.

Proficiency in scripting and automation using Python.

Excellent leadership, communication skills.

working with global cross-functional teams.

Working knowledge of safety-critical design flows in automotive systems.

Knowledge of Automotive Functional Safety ISO26262 is a plus.

ST is proud to be one of the 17 companies certified as a 2025 Global Top Employer and the first and only semiconductor company to achieve this distinction.

ST was recognized in this ranking thanks to its continuous improvement approach and stands out particularly in the areas of ethics & integrity, purpose & values, organization & change, business strategy, and performance.

At ST, we endeavor to foster a diverse and inclusive workplace, and we do not tolerate discrimination.

We aim to recruit and retain a diverse workforce that reflects the societies around us.

We strive for equity in career development, career opportunities, and equal remuneration.

We encourage candidates who may not meet every single requirement to apply, as we appreciate diverse perspectives and provide opportunities for growth and learning.

Diversity, equity, and inclusion (DEI) is woven into our company culture.

To discover more, visit st.com/careers.