Infra Design Verification Sr Lead Engineer

Preferred Qualifications

• Following skill set is required:
• Strong Debug, UVM, System Verilog
• Understanding Specs and Standards and developing relevant test plans
• Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs are found and resolved
• Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, Must be willing to dig into fail and understand what is happening
• Preferred Qualifications 5+ Year of industry experiences in the following areas: - Thorough understanding of Digital design concepts Thorough understanding dv methodologies and tools Good understanding of LPDDR4/LPDDR5 protocols Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite
• Thorough understanding of Digital design concepts
• Thorough understanding dv methodologies and tools
• Good understanding of LPDDR4/LPDDR5 protocols
• Understanding of Bus protocols like AHB/AXI/ACE/ACE-Lite
• Applicants : Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here . Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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• If you would like more information about this role, please contact Qualcomm Careers .