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ASIC RTL Design Engineer
Tesla
Bengaluru, IND
Full-time
Mid · 5+ years experience
Onsite
Discovered 3 weeks ago
VerilogIEEE Floating PointHigh speed SERDESWaveform debug tools
Free
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VerilogIEEE Floating PointHigh speed SERDES
Key Skills for This Role
VerilogIEEE Floating PointHigh speed SERDESWaveform debug tools
Full Job Posting
What You’ll Do
Micro-architecture specification and design.
Deliver Performance, Area and Power-efficient RTL design.
Specification, microarchitecture, and RTL design of accelerators, memory and network subsystems.
Work with the architecture and software teams to achieve design targets.
Balance performance, power, safety, and cost requirements.
Trade-off functional, physical and performance requirements.
Work with cross-functional teams, including implementation, verification, and performance engineers.
Design for synthesis.
What You’ll Bring
High performance (low latency, high bandwidth) design techniques
Area and power-efficient complex RTL design
Low power microarchitecture techniques
Verilog RTL logic design.
Experience with simulators and waveform debug tools.
Knowledge of logic design principles, including timing and power implications.
Degree in Electrical Engineering, Computer.
Science, or equivalent experience.
5 or more years of industry experience.
Experience with IEEE floating point is a plus.
Experience with high speed SERDES or SOC design is a plus.
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