Staff Hardware Board Design Engineer

Role Overview

Main Responsibilities

• Lead board-level architecture and schematic ownership for accelerator cards, modules, and test platforms.
• Design evaluation and bring-up hardware for new ASICs and SoCs, including power rails, sensing, clocking, access ports, and instrumentation points.
• Define stackup, materials, impedance targets, and routing constraints for PCIe Gen4/5/6, DDR5, LPDDR5, GDDR, and 25G+ SerDes interfaces.
• Architect high-current PDNs and multi-phase VRMs, including sequencing, telemetry, and decoupling strategy.
• Drive first-silicon bring-up, including power-on, characterization, margining, and cross-functional debug.
• Use oscilloscopes, high-bandwidth probes, VNAs, BERTs, protocol analyzers, power analyzers, and thermal tools.
• Apply Python to lab automation, data capture, and measurement workflows.
• Oversee DFM, DFT, DFA, prototype builds, ECOs, BOM control, and vendor engagement through fabrication and assembly.
• Act as design authority in reviews and produce documentation, test plans, and cross-functional alignment.

Qualifications

• 10+ years of board-level high-speed digital design experience are required.
• Recent direct schematic and architecture ownership is required using Allegro System Capture, OrCAD, Altium, or Xpedition.
• The candidate must have personally owned one platform end to end from concept through volume production.
• The candidate must have completed a first-silicon bring-up involving a board designed to power up a new ASIC or SoC.
• Hands-on experience defining stackup and routing constraints is required for PCIe Gen4+, DDR5, LPDDR5, GDDR, or 25G+ SerDes.
• Strong PDN and multi-phase VRM design experience is required at high current levels, including PMBus and sequencing.