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Staff Digital Design Engineer (FPGA)
Analog Devices
Massachusetts, USA
Full-time
Senior · 8+ years experience
Discovered 2 weeks ago
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Role Overview
ADI’s Aerospace and Defense Sensors, Subsystems, & Space business unit has an open position for an experienced Staff Digital Design Engineer with a background in FPGA/ASIC RTL and schematic capture.
Working on new technology development, you will design cutting-edge integrated modules and subsystems for electronic warfare (EW), communication, and phased array radar systems.
In this position, you will interface with staff involved with design, testing, manufacturing engineering, program management, business development, and division management throughout all program phases of research, design, and production.
This position requires deep expertise across multiple technical domains and strong cross-functional collaboration skills to drive innovation and excellence in digital design.
Key Skills for This Role
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Qualifications
- Expert ability to define and implement complex digital system architectures
- Board level design, including part selection, schematic capture, debug, and optimization
- RTL design (Verilog, VHDL), simulation, timing closure in large FPGAs
- High speed interface design and bring-up and testing, e.g. 100 GigE, Aurora, PCIe
- Experience with schematic capture and PCB layout tools, e.g. Allegro, PADS
- Skilled in design techniques that maximize isolation and prevent signal integrity issues.
- Strong organizational and communications skills with ability to work in a fast-paced & dynamic environment.
- U.S. citizenship
- Ability to obtain a Secret Clearance
- Preferred Education and Experience
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience
- 8+ years of relevant experience in digital design engineering
- Experience with DOD radar, electronic warfare, or RF communications algorithms
- Familiarity with C#, Python, C/C++, TCL
- Familiarity with RF systems
- Experience with low complexity DC power tree designs and voltage sequencing
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