Senior Engineer Design

#WeAreIn to transform theoretical concepts into real hardware designs.

Are you in?

• Own and drive STA flow and signoff methodology for HOBTO and Bixby Creek platforms.
• Develop, qualify, and deploy scalable timing signoff methodologies.
• Automate flow validation, regression testing, and STA infrastructure.
• Collaborate with Physical Design, Design Signoff, and global R&D teams to deliver production-quality STA solutions.
• Improve flow efficiency, accuracy, and robustness through continuous methodology enhancements.

Your profile Qualifications and skills to help you succeed

• Own and drive STA methodology initiatives, including roadmap planning, issue resolution, and deployment of new features.
• Develop and maintain STA flows encompassing MMMC setup, setup/hold analysis, OCV/AOCV/POCV implementation, SI-aware timing analysis, and voltage-aware STA methodologies.
• Design, enhance, and support reusable STA infrastructure, automation solutions, and regression frameworks using Tcl, Python, and Linux scripting.
• Plan and execute regression testing for methodology updates and tool-version qualifications; analyze QoR correlations and debug timing discrepancies.
• Collaborate with Cadence R&D and internal stakeholders to investigate tool issues, track JIRs, and validate fixes.
• Drive improvements in flow runtime, scalability, and robustness while ensuring signoff-quality standards are maintained.
• Represent the India STA Methodology team in technical reviews and lead cross-site collaboration to ensure technical alignment and best-practice adoption.

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT.

Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals.