Principal System Software Architect

We are looking for a Principal System Software Architect to join our HW/SW Co-Design team. This is not a role about drawing abstract boxes on slides -- it is about making real, data-driven architecture decisions early in the SoC and IP design cycle by writing code, building virtual platforms, and validating system designs before silicon exists.

You will work hand-in-hand with a hardware architect counterpart from day one. Your mandate is to ensure that every major design decision -- from IP block selection to data flow topology to accelerator sizing -- accounts for the software developer experience, real-world performance, and customer usability.

The systems we build ultimately ship to customers whose engineers interact with them through software. You will be the voice of those customers during architecture definition, ensuring that the products we deliver are not only high-performing but also debuggable, straightforward to integrate, have efficient hardware/software interfaces, and have adopted the right ISAs, configurations, and memory sizes.

Key Responsibilities

Hardware/Software Tradeoff Analysis: Drive the right balance between hardware complexity, software complexity, performance, and customer usability at the earliest stages of product definition.

System Design Evaluation: Assess system designs, IP blocks, data paths, and device configurations from a software perspective, identifying risks and opportunities before RTL is written.

Customer Advocacy: Act as a strong voice and proxy for customers -- particularly their software teams -- who will ultimately interface with the devices we build. Build direct relationships with internal and external customer SW organizations to deeply understand their needs.

IP & Accelerator Co-Definition: Propose and co-define new IP blocks, hardware accelerators, and device configurations alongside digital and analog hardware design teams to achieve best-possible system performance.

Debuggability & Observability: Champion best-in-class debuggability and software visibility into devices, both during bringup and in deployed field environments.

Early Virtual Platform Development: Build and use SystemC-based functional virtual platforms, or work with early transactional models to validate architecture decisions with real code -- well before silicon availability.

Data-Driven Decision Making: Use early simulation, profiling, and modeling to quantitatively justify sizing, IP selection, and architectural choices rather than relying on intuition alone.

Customer Engagement: Meet with technical experts at customer organizations, understand their system-level requirements, and translate those into actionable architectural guidance for internal teams.

Required Qualifications

12+ years of experience in system software architecture, embedded systems, or SoC platform software

Demonstrated ability to work at the hardware/software boundary and influence hardware design decisions

In-depth experience with AMBA protocols

Experience with SystemC (TLM 2.0) for virtual platform development and early architecture exploration

Proficiency in C/C++ with experience writing firmware, drivers, or platform-level software

Experience with early-stage SoC or ASIC development workflows -- architecture definition through silicon bringup

Strong understanding of computer architecture fundamentals: memory hierarchies, bus protocols (AXI/AHB/APB), DMA, interrupt architectures, and hardware accelerator integration

Ability to read and understand RTL (Verilog/SystemVerilog) sufficiently to evaluate hardware design intent and debug integration issues

Excellent communication skills -- able to present complex tradeoffs to both hardware engineers and customer software teams

Track record of building relationships with internal and external customers, especially their software/firmware organizations

Preferred Qualifications

Familiarity with FPGA prototyping workflows and pre-silicon software development

Experience with hardware emulation platforms (Palladium, etc.)

Knowledge of signal processing, data converter, or mixed-signal system architectures

Experience defining or influencing debug/trace infrastructure (e.g., CoreSight, JTAG, embedded trace)

Background in performance modeling, system-level benchmarking, or workload characterization

Familiarity with RISC-V or Arm architecture and ecosystem tooling

Experience with Zephyr RTOS and/or Embedded Linux

Experience with DevOps practices for platform software (CI/CD, automated testing on virtual platforms)

What Sets This Role Apart

This team practices applied architecture. We don't hand off a spec and walk away. We write real code on virtual platforms months or years before tape-out. We measure, profile, and iterate. We sit with hardware designers and debate register maps, buffer depths, and interrupt strategies with data to back up every recommendation.

This is a deeply hands-on role. Expect to spend days at a time around a table with your hardware and design verification counterparts, working through the details that matter -- interface definitions, timing constraints, configuration trade-offs. It requires attention to detail, the ability to compromise effectively, and the interpersonal skills to build trust with HW, DV and other SW teams whose constraints are different from your own.

As requirements evolve and design decisions are tested against reality, you will be there to re-evaluate, adapt, and ensure the end product delivers on its original promise.

If you've ever been frustrated by poorly designed hardware/software interfaces, missed opportunities to build more efficient and field-debuggable devices, or software that requires hundreds of lines of code to perform what should be a straightforward operation -- you'll thrive in this role. We believe that excessive software complexity to compensate for hardware design gaps is a design failure, and this role exists to prevent exactly that.

Education

BS/MS/PhD in Computer Engineering, Electrical Engineering, Computer Science, or a related field

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.