Principal STA Engineer

• 12+ Years of relevant Experience After a Bachelor or Master of Engineering degree in Electrical/ Electronic/VLSI Engineering or related field.
• Must have led at least 2 SOCs in capacity of SOC Sign-off lead especially. Solid Expertise in Primetime or Similar timing tools
• good understanding of overall ASIC Physical Design/DFT, Tools and implication on Timing Convergence
• Must have in-depth understanding of relevant areas of Library / Memory / Other collaterals and dependencies on STA
• Must understand Ultra Submicron issues, Variation aware/Aging Aware Design Sign-off Must understand CTS/Other clock Distribution methodologies well.
• Teamwork / flexibility / ability to thrive in a dynamic environment are very important

For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S.

of Commerce - Bureau of Industry and Security and/or the U.S.

of State - Directorate of Defense Trade Controls.

As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.

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