FPGA Software

Basic Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field
• 5+ years of experience in FPGA/RTL design, including architecture, RTL coding, verification, synthesis, and timing closure
• Proficiency in SystemVerilog or Verilog for production FPGA development
• Hands-on experience with FPGA + ARM SoC platforms (e.g., Xilinx/AMD Zynq or Zynq UltraScale+) and AMD/Xilinx toolchains (Vivado, Vitis, Petalinux)
• Experience designing high-speed digital interfaces and DDR/DMA-based datapaths
• Experience integrating FPGA logic with embedded software, including memory-mapped register interfaces and driver-level debugging
• Hands-on hardware bring-up and lab debugging experience with oscilloscopes, logic analyzers, and embedded debug tools
• Demonstrated ability to own open-ended design problems independently and carry them from hardware

Preferred Qualifications

• Master's degree in Electrical Engineering, Computer Engineering, or a related discipline
• Experience in aerospace, defense, semiconductor, or other high-reliability development e
• Experience with image sensor interfaces and camera pipelines (e.g., MIPI CSI-2, LVDS/SLVS, SubLVDS) or other high-bandwidth sensor front-ends
• Familiarity with Versal ACAP architecture and/or Intel/Altera devices (Cyclone 10) and Quartus toolflows
• Experience with simulation and verification tools such as Questa/ModelSim, Xcelium, or Verilator, and with UVM or other structured verification methodologies
• Working knowledge of embedded Linux internals — device trees, kernel drivers, userspace/hardware interaction — on ARM platforms
• Proficiency with C/C++, Python, and TCL for bring-up, test automation, and tooling
• Experience with hardware-in-the-loop testing and automated regression of FPGA designs
• Familiarity with fault-tolerant design and radiation effects mitigation (SEU scrubbing, TMR, configuration memory integrity) for space applications
• Experience thriving in fast-paced, high-ownership environments with rapid iteration cycles

The Role

Responsibilities

• Develop and maintain platform firmware and board management infrastructure for advanced compute systems.
• Own system bring-up and low-level boot sequencing for custom hardware platforms.
• Design and implement FPGA/CPLD logic for power sequencing, reset orchestration, watchdog functionality, and telemetry.
• Develop and customize BMC firmware and management stacks using OpenBMC and related technologies.
• Implement and maintain platform management interfaces including Redfish and/or IPMI.
• Debug complex hardware/firmware interactions across CPUs, GPUs, PCIe fabrics, and networking devices.
• Collaborate closely with hardware, validation, thermal, and systems teams during bring-up and deployment.
• Develop fault recovery and autonomous reboot for remote orbital systems.
• Support secure boot, firmware update, and system attestation architectures.

Qualifications

• Hands-on experience in embedded systems, platform firmware, BMC development, or hardware bring-up engineering.
• Strong proficiency in C/C++ and Python.
• Deep understanding of platform initialization and boot architectures.
• Strong familiarity with hardware communication interfaces including I2C, SPI, UART, GPIO, and JTAG.
• Experience debugging hardware/software interactions at board and system level.
• Familiarity with FPGA or CPLD development workflows using Xilinx or Altera platforms.
• Strong systems-level debugging and problem-solving skills.

Preferred Qualifications

• Experience with server platforms, AI infrastructure, or high-performance compute systems.
• Familiarity with PCIe initialization and accelerator bring-up.
• Experience with remote management and fleet-scale telemetry systems.
• Knowledge of secure boot, attestation, and firmware security architectures.
• Familiarity with radiation-tolerant or fault-resilient system design.

Why This Role Is Different

Compensation and Benefits

• The salary range for this position is $150,000 – $200,000 annually. The actual base salary offered will depend on factors such as job-related skills, experience, qualifications, and internal equity.
• Equity in Cowboy Space Corp.
• Employees and their eligible dependents may enroll in medical, dental, and vision insurance
• 401(k) retirement savings plan
• Paid time off
• 10 paid holidays per calendar year
• Paid parental leave
• Relocation assistance if applicable
• Daily lunch in the office and a fully stocked kitchen with beverages and snacks

ITAR Requirements

• Export Control Requirement: To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR), applicants must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about ITAR here .

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