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Etched is building AI chips that are hard-coded for individual model architectures. Our first product (Sohu) only supports transformers, but has an order of magnitude more throughput and lower latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents.
Develop high-performance software to capture debugging signals and create associated tooling to surface valuable insights for users.
Implement a hybrid emulation environment using custom DPI-based streaming transactors.
Create highly configurable chip-to-chip network models using emulation-efficient primitives.
Hands-on experience with emulation on platforms such as Palladium, Protium, Veloce, or Zebu, covering design bring-up, build flows, debugging, and performance tuning.
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Strong experience with C/C++ and Linux system development. Proficiency with SystemVerilog and Verilog, including DPI-based interfaces.
Practical experience with scripting languages (i.e., Python) for automation.
Experience working with UVM verification environments.
Background in design verification, DFT, and testbench modeling.
Familiarity with waveform debug tools such as Verdi or SimVision.
Etched believes in the Bitter Lesson . We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in Cupertino, and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Designing specialized AI chips for transformer model architectures.
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