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System Validation and Emulation team is part of the central SoC digital hardware organization responsible for the overall quality of the SoC silicon.
This team works closely with architects, designers, verification engineers, software engineers, and customers.
We are currently seeking a candidate for the position of System Debug Engineer.
In this role, the candidate will support three critical roles: Bring up, debug, analyze failures at the embedded platform level.
Work with architects, design, and SW to understand test coverage and develop strategies to improve coverage.
Support, develop, and implement solutions for faster debug at the platform level including isolating failing components of a system Creating debug strategies and plans for partners to more rapidly triage failures to isolate specific components including PVT and marginality issues.
Bachelor's degree in Science, Engineering, or related field.
8+ years SOC design, verification, or related work experience.
Candidate will have a minimum of 8 years of experience working in silicon and are expected to have experience in: 8+ yrs of experience in developing silicon validation framework, tests or related infrastructure Experience in ARM-based SOCs including CPUs, DSPs, and other IPs, and system level bring-up and debug (CoreSight, Trace32, etc.) Understanding on Low Power Management, Clocking, Bus-interconnects (AXI, NOC, etc.) and CoreSight Debug infrastructure (STM, ETM, ETB, Trace, etc.) Having System level test scenarios, Usecases, Performance & Power KPIs for Mobile, Compute SOC/Products will be added advantage Debugging Embedded hardware issues with focus SoC, interfaces, and boards using tools including JTAG and SW debuggers. Detailed understanding of embedded systems, board design, signal integrity, and SoC architectures strongly desired.
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