Software Engineer - FPGA-Accelerated RTL Simulation

As the pioneers who introduced RISC-V to the world, SiFive is transforming the future of compute by bringing the limitless potential of RISC-V to the highest performance and most data-intensive applications in the world. SiFive’s unrivaled compute platforms are continuing to enable leading technology companies around the world to innovate, optimize and deliver the most advanced solutions of tomorrow across every market segment of chip design, including artificial intelligence, machine learning, automotive, data center, mobile, and consumer. With SiFive, the future of RISC-V has no limits.

At SiFive, we are always excited to connect with talented individuals, who are just as passionate about driving innovation and changing the world as we are.

Our constant innovation and ongoing success is down to our amazing teams of incredibly talented people, who collaborate and support each other to come up with truly groundbreaking ideas and solutions. Solutions that will have a huge impact on people's lives; making the world a better place, one processor at a time.

Are you ready?

To learn more about SiFive’s phenomenal success and to see why we have won the GSA’s prestigious Most Respected Private Company Award (for the fourth time!), check out our website and Glassdoor pages.

Job Description:

You will be responsible for the C++ application that constitutes the software-component of our custom hardware emulation framework (originally based on FireSim, https://fires.im ). Join a small team (<5 engineers) working on a cross-cutting project that spans the whole stack. You will work closely with:

FPGA RTL Designers: Components of our FPGA-hosted emulators are written in Chisel and optimized for Xilinx FPGAs.

Compiler Developers: We compile ASIC RTL down to deterministic, FPGA-friendly emulation RTL using a purpose-built compiler based on MLIR & CIRCT.

RISC-V Software & HW Developers: Build debug tools to help users co-design and debug novel RISC-V hardware and software.