Senior Signal and Power Integrity Engineer

Lead board/system SI design activities, PCB stack up design, material selection, design guide implementation, layout review, and post-layout analysis.

System-level signal integrity simulation of PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB and other interfaces.

Analyze and optimize Power delivery network (PDN) on PCBs.

Work closely with Package and PCB Design teams crafting solutions for system SI/PI performance.

Work with Application Engineering supporting customer board designs.

TDR & VNA measurement for PKG/PCB material characterization and model correlation

BS/MS in Electrical Engineering (or equivalent experience) with minimum 4 years of experience as a SI/PI engineer

Good understanding of electromagnetics, channel components and transmission line theory

Experience with design and implementation of one or more high speed electrical interfaces, such as PCIE, LPDDR/DDR/GDDR, MIPI, HDMI, USB etc.

Hands on experience with HFSS, Sigrity, Hspice or similar industry standard simulation tools

Experienced with Cadence Allegro PCB designer and Constraints Manager and or other PCB stack up designer tools.

Understanding of impacts of high-volume PCB manufacturing on channel signal integrity

Expertise in one or more of the high-speed interface SI/PI designs on any industry standard system platforms.

Exposure to package design, interface timing budgets and system modeling

Familiarity with high-speed transmitter, receiver design and various equalization schemes

Familiarity with various signaling schemes like NRZ, PAM4 is a plus.

You will also be eligible for equity and benefits .

This posting is for an existing vacancy.

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