eightfold
Senior Manager, Performance Engineering – Kernel and Software Platforms
NVIDIA
Santa Clara, USA
Full-time
Senior Level
Onsite
USD 272000-488750 yearly
Discovered 1 weeks ago
Free
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NVIDIA’s accelerated computing platform relies on continuous performance excellence at every stage of development.
We are seeking an outstanding Performance Analysis Manager to lead an engineering team responsible for supervising and optimizing product performance throughout the full hardware lifecycle.
In this role, you will bridge the gap between design-time predictions and real-world execution: evaluating performance from early simulation and emulation, through post-silicon bring-up, to production hardware and ongoing release support.
Your Role
involves analyzing kernel authoring flows from DSLs to internal code representations.
You will set expectation models, curate workload testlists, and coordinate with CUDA release schedules.
Additionally, you will promote automation with AI tools such as Claude and Codex.
What you'll be doing:
- End-to-End Lifecycle Performance Tracking: Supervise and maintain continuous performance tracking for GPU software products from pre-silicon build time, simulation, and emulation environments through initial post-silicon validation, product hardware, and post-release maintenance.
- Expectation Modeling & Correlation: Architect theoretical and empirical performance models to set targets early in design. Continuously correlate pre-silicon simulation predictions against early hardware and production silicon to diagnose and eliminate discrepancies.
- DSL-to-IR Flow Analysis: Evaluate and benchmark performance translation across diverse kernel authoring flows—analyzing code efficiency from high-level DSLs (e.g., Triton, PyTorch) through compiler Intermediate Representations (IRs) down to target hardware execution across every phase of platform maturity.
- Workload Synthesis & Testlist Build: Identify, craft, and maintain stress-test suites and workload testlists representative of production applications. Use these testlists to stress system performance, detect regressions early in simulation, and validate hardware release candidates.
- CUDA Release Cadence Alignment: Work multi-functionally with compiler, architecture, and platform software teams to ensure performance achievements hit target expectations on schedules strictly linked to the CUDA release timeline.
- Workflow Automation Using Advanced Technology: Integrate modern AI infrastructure (e.g., Claude, OpenAI Codex, agentic LLM workflows) to automate telemetry analysis, root-cause pre-vs-post silicon performance deltas, and streamline performance reporting pipelines.
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