Senior Machine Learning Engineer (Tech Lead), Robot Learning, Loco- Manipulation

Mentor and shape the team, guide junior and intermediate ICs across software, ML, robotics, and perception backgrounds; establish code-quality standards, review practices, and engineering norms; help identify and attract next hires. You write code throughout — this is a tech-lead role, not a step away from the work.

Who You Are

Ph.D. or Master's degree in Robotics, Mechanical Engineering, Electrical Engineering, Computer Science, or a related field or equivalent experience.

5+ years of hands-on robot learning experience. You have shipped sim-to-real policies on real robots, across different tasks or platforms.

Demonstrated technical leadership and mentorship. You have made architectural decisions on robot learning systems that others built on, and you have meaningfully shaped the development of more-junior engineers as a tech lead. This can be in academia (leading a lab subgroup, advising students) or industry.

Deep sim-to-real expertise — domain randomisation, system identification, teacher-student distillation, sim-to-online fine-tuning. You can design a transfer strategy for a novel problem.

Full-stack robot learning — fluent across simulation construction, policy training, data collection, real-world deployment, and failure diagnosis.

Physics-informed ML or hybrid control experience — PINNs, neural ODEs, MPC with learned dynamics, process-model-conditioned generation, or similar.

A defensible view on visual-reasoning-centric substrates for grounded spatial / physical reasoning.

Push-back willingness — you can defend a non-obvious architectural commitment under pressure, and change your mind on evidence.

Strong programming skills in Python and C++; production-quality code with reproducibility, testing, and maintainability discipline.

Strong communication skills, able to convey complex technical concepts to a diverse audience.

Demonstrated independent technical authority — you have set technical direction in a tech-lead capacity, leading a research subgroup, owning an architecture across multiple ICs' work, or making the architectural call on a high-profile project.