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Senior FPGA Design Engineer
Altera
Bengaluru, IND
Full-time
Senior · 6+ years experience
Onsite
Discovered 3 weeks ago
FPGAVerilogSystemVerilogDDRLPDDRPCIe
Free
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FPGAVerilogSystemVerilog
Role Overview
We are seeking an experienced FPGA Design Engineer to develop FPGA-based solutions for pre-silicon validation, hardware prototyping, and high-speed interface verification.
The ideal candidate will have a strong digital design background, hands-on FPGA implementation experience, and expertise in high-speed protocols and memory interfaces.
This role involves close collaboration with design, verification, firmware, and post-silicon validation teams to accelerate product development and improve design quality.
Key Skills for This Role
FPGAVerilogSystemVerilogDDRLPDDRPCIe
Full Job Posting
Job Description:
We are seeking an experienced FPGA Design Engineer to develop FPGA-based solutions for pre-silicon validation, hardware prototyping, and high-speed interface verification. The ideal candidate will have a strong digital design background, hands-on FPGA implementation experience, and expertise in high-speed protocols and memory interfaces. This role involves close collaboration with design, verification, firmware, and post-silicon validation teams to accelerate product development and improve design quality.
Key Responsibilities
- Design and implement FPGA-based prototypes for ASIC validation and feature development.
- Develop RTL in Verilog for FPGA implementation.
- Integrate complex IPs such as DDR, LPDDR, PCIe, Ethernet, CXL, or HBM into FPGA platforms.
- Perform FPGA synthesis, place-and-route, timing closure, and resource optimization.
- Debug FPGA designs using embedded logic analyzers (SignalTap), simulation, and hardware instrumentation.
- Develop board-level bring-up and validation plans for FPGA platforms.
- Create automation scripts for FPGA build, regression, and deployment flows using Python, Tcl, or Bash.
- Collaborate with architecture, RTL, verification, firmware, and post-silicon teams to resolve functional and performance issues.
- Drive FPGA methodology improvements, coding standards, and design best practices.
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