Senior DFT Engineer

Requirements

• 4-8 years of industry experience in DFT domain.
• Must have experience in bringing atleast one or two products to successful production from architecture phase, scan implementation and simulations.
• Must have hands-on experience working on post-silicon activities.
• Having working experience with tessent DFT (SCAN, Mbist, Lbist, OCC, EDT, SSN, Boundary Scan) will be preferred.
• Exceptional interpersonal and communication skills are critical for working, influencing and collaborating with product development groups and CAD tool teams spread across the globe.
• Scripting skills in Perl/Python/TCL and a good command over HDLs.
• Candidates with exposure to deep submicron effects and low power implementation using UPF/CPF will be at an advantage. Candidates with experience using Cadence digital implementation tools (Genus, Tempus) would be preferred.
• Prior experience of timing closure/physical design will be an added plus.
• For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position – except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) – may have to go through an export licensing review process.
• Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.