Senior Design Verification Engineer - GPU Memory Subsystem

Actively collaborate with RTL, DV, FV, and Arch teams to then develop and implement design verification strategies for our GPU ASIC memory subsystem IP.

Perform functional and performance verification using advanced tools and methodologies. Bring your innovative ideas to the table.

Gain a deep understanding of this critical IP's micro-architectural design and implementation while continuing to advance your verification skills.

BS Degree in CompE, EE, CS, or equivalent experience

5+ years of experience covering the full scope of pre-silicon ASIC verification, including the development of verification strategy, test plans, tests, testbench components, regression triage, debug, and coverage closure and experience with industry standard tools

Working knowledge of computer architecture fundamentals and their constructs in Verilog/System Verilog

Strong analytical thought process and outstanding debug skills.

Experience with caches, coherency, complex pipelines, arbiters, or interconnect networks

Infrastructure development, use of AI to support design and verification development

Testbench development experience, especially with UVM components used in multiple levels of verification

Strong programming/scripting experience in Python or C++. Applying suitable algorithms, data structures, and error handling

You will also be eligible for equity and benefits .

This posting is for an existing vacancy.

NVIDIA uses AI tools in its recruiting processes.