Senior ASIC Engineer, Switch SoC

We are currently seeking an expert SOC Design and Integration Engineer with strong design fundamentals to work in Switch Silicon group.

You'll join a group of hardworking engineers to craft and implement the next generation innovative Switch Silicon chips.

In this position, you'll make a real impact in a dynamic, technology-focused company while developing best high-speed communication devices, delivering the highest throughput and lowest latency!

The Networking Chip Design team in India is a new team which is growing at a fast pace.

What you'll be doing:

• You are encouraged to understand all features of a given project and define project milestones based on internal roadmaps, assign them and track them through agile framework
• Define and develop system-level methodologies, tools, and IPs to build SOCs in an efficient and scalable manner.
• Work on SOC Assembly and drive cross-functional teams towards SOC milestone execution.
• Be responsible for integrating all the pieces for a given defined project milestone and deliver the model to relevant teams for further verification at cluster/sub-system/SOC/emulation levels.
• Have good grasp of Perl, Python, or other industry-standard scripting languages.

What we need to see:

• BS (or equivalent experience) / MS with 4+ years of practical semiconductor design and architecture experience building complex SoC’s.
• Must have firsthand experience & solid understanding of all phases of SOC development in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & Physical design.
• Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.).
• C/C++ programming or python or any other industry-standard scripting language experience desirable.
• Experience working with software teams to tightly define the HW/SW interface including control/status registers, interrupt and error handling.
• Hands on experience in successful tape outs of multiple complex, high-volume SoCs in advanced process nodes.
• Exposure to various Chip Design Functions to be able to collaborate and solve complex cross functional problems.
• Excellent verbal and written communication skills to interact with cross functional teams to build consensus.