Principal Product Applications Engineer

Role overview

Employment and compensation

• The position is full-time and permanent.
• Compensation is listed as CAD 165,000–CAD 210,000 plus applicable bonuses, incentives, and benefits.

Customer enablement

• Lead technical engagements with hyperscalers, ODMs, OEMs, and AI system partners.
• Support architecture discussions, system design-in, evaluation, bring-up, and deployment.
• Lead on-site and remote debugging, performance tuning, and system integration.
• Translate customer requirements into feedback for product, silicon, firmware, and engineering teams.

Validation and integration

• Influence post-silicon validation strategies for next-generation switching platforms.
• Execute system-level integration and troubleshoot complex hardware and software issues.
• Debug PCIe Gen 6/7, UALink, UCIe, signal integrity, firmware, and software-stack challenges.
• Partner with hardware, firmware, and SI/PI teams on root-cause analysis and production solutions.

Technical leadership

• Serve as the primary Scorpio applications expert across sales, marketing, product, and engineering.
• Mentor junior applications engineers and provide technical guidance across customer projects.
• Represent the organization at customer executive reviews, industry forums, and standards bodies.
• Develop technical collateral, white papers, training materials, and customer documentation.
• Contribute customer and technical insights to product and technology roadmaps.

Required qualifications

• A bachelor's degree in electrical engineering, computer engineering, computer science, or a related technical field is required.
• At least eight years of relevant product applications, systems engineering, or post-silicon validation experience is required.
• Experience with high-speed connectivity or networking silicon is required.
• Hands-on laboratory bring-up, system debugging, and integration experience is required.
• Direct experience with hyperscalers, cloud providers, Tier-1 OEMs, or ODMs is required.

Preferred qualifications

• A master's or PhD in a related engineering discipline is preferred.
• Experience with PCIe Gen 6/7, UALink, UCIe, and compliance testing is preferred.
• Knowledge of AI/ML rack-scale architectures, GPU fabrics, and accelerator interconnects is preferred.
• Python or shell scripting, standards participation, and technical publication experience are preferred.