Principal Engineer, Package Co-Design

About GlobalFoundries

Introduction

Key Responsibilities

• Lead die-package co-design strategy for custom silicon products developed by MIPS covering industrial, automotive and other end-equipment. Drive the overall packaging engagement on these products.
• Define package architecture, selection in alignment with silicon floorplan, bump layout, and IO planning. Drive early feasibility studies, trade-off analysis across performance, cost, signal integrity, thermal and manufacturability. Drive as technical liaison and direct the overall package solution and architecture.
• Drive Package co-design design and related Engineering work. Work on interface placement, IO ring development and overall die floorplan to optimize package routing, escape routing and bump/pad alignment. Work with SoC design team on power grid integration and design for signal and power integrity
• Cross-collaboration and system level leadership working closely with different disciplines such as SoC Design, Board/System level design, and customers to develop compelling and differentiated solutions. Strong understanding of package level issues, performance, cost trade offs, reliability considerations and proven track record in driving technology, vendor engagements