eightfold
Principal Engineer Digital Design
Infineon Technologies
Irvine, USA
Full-time
Senior · 12+ years experience
Hybrid
USD 164400-241000 yearly / year
Discovered 1 weeks ago
VerilogSystem VerilogHDLMATLABSimulinkC
Free
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VerilogSystem VerilogHDL
Key Skills for This Role
VerilogSystem VerilogHDLMATLABSimulinkC
Full Job Posting
- Implement DSP algorithms (e.g., Filtering, Error Correction coding, Echo Cancellation, Receiver Equalization and so on) in Verilog/System Verilog , ensuring adherence to design specifications
- Collaborate with algorithm and systems teams to define hardware architecture
- Translate fixed-point MATLAB/C/C++ models into fixed-point, synthesizable HDL code
- Conduct performance analysis , optimizing for latency, throughput, power, and area (PPA)
- Create design documentation and work with the DV team to verify functionality
- Perform Linting, CDC checks and so on to ensure high-quality design hand-off
- Support ASIC synthesis, timing closure, and silicon debugging
- Bachelor’s or Master’s degree in EE/Computer Engineering
- 12+ years of experience in RTL design ( Verilog/System Verilog )
- Strong knowledge of fixed-point math for signed binary numbers (such as sign-extension, addition, multiplication, rounding and saturation),and digital signal processing fundamentals are a big plus
- Proven experience in implementing DSP algorithms on FPGA or ASIC is a big plus
- A certain degree of understanding in MATLAB/Simulink/C/C++ is another big plus
- Experience with EDA tools (e.g., Synopsys Design Compiler, Cadence)
- Excellent problem-solving skills and teamwork
About Infineon Technologies
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