Principal Digital Verification Engineer

Role Overview

Verification Responsibilities

• Verify DDR5 data buffers against functional and performance specifications.
• Define verification strategies, develop test plans, execute tests, and monitor coverage.
• Develop reusable UVM verification environments, testbench structures, tests, and checkers.
• Work with design teams to ensure designs meet requirements and are testable.

Technical Leadership

• Provide technical guidance and mentoring to verification engineers.
• Drive quality control of verification plans and provide management updates on verification status.
• Identify process improvements that increase verification quality and efficiency.

Qualifications

• Master's degree in electrical or computer engineering, or equivalent, with at least 8 years of experience.
• Alternatively, bachelor's degree in electrical or computer engineering, or equivalent, with at least 10 years of experience.
• Experience with system-level and block-level testing using UVM methodology.
• Experience with verification planning, coverage, tests, checkers, and reusable testbench environments.