Principal Design Automation Engineer

• MS (PhD preferred) in electrical engineering required. 8+ years of NAND design relevant proven experience required with proficient knowledge of Nand Flash memory read, program and erase algorithms
• Proficiency in analog/mixed signal circuit design (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog)
• Proficiency in analog/mixed signal circuit layout (page buffers, block selectors, Xdecoder, Ydecoder, bias table and waveforms, PDNs, level shifters, charge pumps, op amps, DACs, ADCs, linear regulators, oscillators, bandgap, IO buffers, RTL, Verilog)
• Proficient fundamentals in semiconductor and device physics and analog/mixed-signal circuit design. An understanding of semiconductor reliability issues including CHC, NBTI, stress, and snapback, as well as Electromigration (EM) and IR analysis.
• Proficiency in circuit verification and optimization, layout planning, parasitic extractions of the circuits, experience guiding layout. Strong understanding of circuit design verification flows, including block‐level, subsystem‐level, and full‐chip simulations, corner management, PVT/mismatch analysis, and results qualification. analog and digital simulators such as HSPICE, Fast SPICE, and Verilog
• Proven proficiency in Python for engineering automation, including development of maintainable scripts, libraries, or frameworks that collaborate with EDA tools for simulation control, data extraction, regression management, or reporting. Proficient with Cadence design, LVS/DRC tools and UNIX

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