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Optical Interconnect Architect
Plessey Semiconductors
Oxford, GBR
Full-time
Senior · 10+ years experience
Onsite
Discovered 1 weeks ago
SerDesASICSoCEthernetPCIeCXL
Free
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SerDesASICSoC
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SerDesASICSoCEthernetPCIeCXL
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Key Responsibilities
- Define system and link architectures for next-generation optical interconnects.
- Develop the electrical/optical interface architecture between ASICs, SerDes, optical engines, and photonic devices.
- Lead architecture of high-speed SerDes-based optical links.
- Evaluate and define architectures for co-packaged optics (CPO), silicon photonics, optical I/O, chip-to-chip and package-to-package interconnects.
- Develop link budgets and system-level requirements covering bandwidth, latency, optical power, insertion loss, BER, energy/bit, thermal performance, and reliability.
- Work closely with ASIC, SerDes, photonics, packaging, and system engineering teams to translate system requirements into implementable architectures.
- Evaluate emerging optical emitter and receiver technologies and their integration with high-speed electrical interfaces.
- Assess new technologies for short-reach optical interconnects, including highly parallel optical architectures and emerging emitter technologies.
- Define electrical and optical interfaces, including requirements for drivers, receivers, modulators, photodetectors, lasers/emitters, and optical coupling.
- Lead architectural trade studies between electrical copper, VCSEL, laser-based silicon photonics, CPO, and emerging optical I/O technologies.
- Develop system-level specifications and contribute to technology roadmaps and product strategy.
- Work with semiconductor and photonics partners to evaluate technology feasibility, performance, scalability, and manufacturability.
- Support prototype development, system validation, and characterization of high-speed optical links.
Skills, Knowledge and Expertise
- 10+ years of experience in high-speed semiconductor, networking, optical communications, or related technology development.
- Deep experience with SerDes architecture and high-speed I/O.
- Strong understanding of ASIC/SoC architecture and high-speed electrical interfaces.
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