MTS HIG-HBM-LAYOUT

Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

• Lead end-to-end layout execution of analog, mixed-signal, custom digital blocks and full-chip integration for HBM products.
• Own full-chip technical decisions covering analog, digital, memory, ESD, EM/IR and ensure optimal performance, power, and area (PPA).
• Technical Expertise: Hands-on experience in layout design of critical Memory /Analog and mixed-signal blocks such as: Array Layout, Decoder, Control logic, IOs, PLLs, ADCs, DACs, LDOs, Bandgaps, Reference Generators, Charge Pumps, Current Mirrors, Comparators, and Differential Amplifiers.
• Drive project planning and execution, including area/time estimation, scheduling, task delegation, and milestone tracking across multiple concurrent programs.
• Ensure timely delivery with quality, responsible for block-level and full-chip layouts meeting schedule commitments and quality expectations.
• Perform and oversee layout verification activities including LVS, DRC, Antenna checks, and ensure closure with proper documentation and audits.
• Lead and mentor the layout team, guiding junior engineers on sub-block execution, conducting design reviews, and enabling capability development.
• Drive innovation and productivity improvements, including adoption of AI/automation to reduce layout effort, improve turnaround time, and enhance quality.
• Collaborate with global cross-functional teams (Design, Verification, IP, Packaging) and ensure strong communication for project alignment and success.
• Support customer and product integration needs, including specification alignment, design clarifications, and successful implementation of Micron solutions.
• Contribute to organizational growth and leadership initiatives, including team building, hiring, performance management, and representing Micron in industry engagements.
• 18 + year experience in analog/custom layout in advanced CMOS process.
• Minimum 4+ years developing teams and project experience.
• Should have experience in leading multiple project and Tape-out.
• Expertise in Cadence VLE/VXL and Calibre DRC/LVS is a must.
• Must have strong skills in layout and floor planning skills and manual routing.