Lead Software Engineer - DFT IP R&D

Position: Lead Software Engineer - DFT IP R&D

Cadence Design Systems is looking for a highly motivated software and hardware engineer to work as a member of the R&D staff on Cadence’s MODUS DFT software solution. MODUS is a complete product that encompasses Design for Test Solution for Achieving High Coverage, Reduced Test Time, and Superior PPA. The product breadth means we are looking for skilled and motivated candidates with backgrounds in RTL design, DFT architecture, computer architecture, verification, RTL compilation, placement, static timing analysis, power analysis, routing, extraction, and optimization. You will be part of a team responsible for creating the innovative technologies required for technology leadership in the DFT space. This position will encourage building of a solid foundation in logic circuits and gentle entry into larger DFT IP tool development. Development responsibilities include designing, developing, troubleshooting, debugging and supporting the MODUS software product.