IC Design Engineer

The Central Engineering Team is responsible for standard cell development and custom design solutions that power cutting-edge AI compute cores and CPUs. We are seeking a motivated and technically strong engineer to join our team.

Job Description:

Layout design of digital high-performance blocks

Timing closure of the blocks with best PPA (power/performance/area)

Debug LVS/DRC/ERC errors with verification tool

Analyze the trade-offs and performance implications of different cell architectures

Collaborate with design and layout engineers to optimize layout for area and performance

Work with CAD, packaging and foundry teams in resolving layout and / or verification issues

Ideal Candidate Will Have:

Strong understanding of physical implementation.

Experience working with advanced semiconductor technologies.

Experience in implementing low power and high-performance cores

Excellent communication and cross-functional collaboration skills.

Ability to analyze complex trade-offs and make data-driven decisions.

5-10 years of hands-on experience with Place and route tools

Bachelors and 5+ years of related experience; Master’s or PhD in Engineering is a plus

Compensation and Benefits

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.