FPGA Engineer

Job requirements

• Bachelor’s or Master’s degree in Electrical Engineering or related field.
• 5–7 years of experience in FPGA/ASIC design and development and embedded platforms.
• Strong understanding of digital signal processing (DSP) principles.
• Proficiency in RTL design (VHDL, Verilog, or SystemVerilog).
• Experience with FPGA toolchains (e.g., Xilinx Vivado/Vitis, Intel Quartus).
• Experience implementing high-speed digital interfaces (e.g., JESD204, LVDS, SERDES).
• Familiarity with MATLAB/Simulink or Python for algorithm development and modeling.
• Understanding of fixed-point arithmetic and hardware-efficient DSP implementation.
• Experience with wireless communication systems (LTE, 5G NR).
• Knowledge of PHY-layer signal processing (OFDM, MIMO, channel estimation, synchronization).
• Experience with RFSoC or similar integrated RF + FPGA platforms.
• Familiarity with beamforming architectures (digital or hybrid).
• Experience with embedded SoC environments (ARM cores, Linux, bare-metal).
• Exposure to high-speed networking protocols (e.g., Ethernet, eCPRI).
• Experience with hardware/software co-design and system partitioning.
• Familiarity with version control (Git) and CI/CD workflows for FPGA development.
• Familiarity with FPGA development for space applications.

Job responsibilities

• Design, implement, and verify FPGA-based DSP algorithms for communications systems (e.g., channelization, modulation/demodulation, filtering, beamforming).
• Develop high-performance RTL (VHDL/Verilog/SystemVerilog) for real-time signal processing pipelines.
• Implement and optimize data paths involving high-speed ADCs/DACs (e.g., JESD204B/C interfaces).
• Integrate FPGA designs within heterogeneous SoC platforms (e.g., Xilinx/AMD Versal, Zynq, RFSoC).
• Support development of software-defined radio (SDR) platforms and digital front-end architectures.
• Collaborate on system partitioning between FPGA fabric, embedded processors, and external compute platforms.
• Perform timing closure, resource optimization, and performance tuning for high-throughput designs.
• Develop simulation and verification environments (MATLAB, Python, HDL testbenches).
• Interface with RF, systems, and software engineers to ensure end-to-end system performance.
• Document architectures, design decisions, and test results for internal and external stakeholders.

Job benefits

SWISSto12 has successfully established contracts with Intelsat, Inmarsat, Astrum Mobile and ESA for HummingSat as well as contracts for their RF product line in Europe, and the US with prominent partners and customers such as Thales, Lockheed Martin, Northrop Grumman, SES and the ESA.

SWISSto12 is a spin off from the Swiss Federal Institute of Technology in Lausanne (EPFL), is privately owned and backed by prominent Swiss and European Investors.

SWISSto12 is headquartered in Lausanne, Switzerland, and operates a US and European-subsidiariesy in Foster City California.

The company is well funded for its near and mid-term developments and backed by a solid customer revenue stream.