Field Programmable Gate Array (FPGA) Engineer

Bowhead is seeking a FPGA Engineer to join our team that supports the Hypersonics Projectiles Division of the Naval Surface Warfare Center Dahlgren and contribute to the development of high-performance digital systems.

In this role, you will design, implement, and optimize FPGA-based solutions for complex hardware applications.

You will work with VHDL, Verilog, and high-level synthesis tools, collaborating with cross-functional teams to ensure efficient and reliable hardware integration.

• Design and develop FPGA-based architectures for real-time and high-speed applications.
• Implement and optimize VHDL/Verilog code for FPGA designs.
• Conduct simulation, synthesis, and timing analysis to ensure performance optimization.
• Perform debugging and validation of FPGA designs using industry-standard tools and methodologies.
• Collaborate with hardware, software, and systems engineering teams to develop integrated solutions.
• Develop and maintain FPGA testbenches for functional verification.
• Contribute to system integration, testing, and troubleshooting of FPGA-based hardware.
• Document design specifications, implementation details, and test results.
• Other duties as assigned
• Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 3-7 years of experience in FPGA design and development.
• Proficiency in HDL programming (VHDL, Verilog) and FPGA development tools (Vivado, Quartus, etc.).
• Strong understanding of digital logic design, high-speed interfaces, and embedded systems.
• Experience with hardware/software co-design and debugging tools (Oscilloscope, JTAG, Signal Analyzer).
• Ability to work in a fast-paced environment and manage multiple projects effectively.

• Experience with Xilinx, Altera (Intel FPGA), or Lattice FPGA architectures.
• Knowledge of C/C++, Python for FPGA development.
• Understanding of high-performance computing, signal processing, and networking applications.
• Familiarity with System Verilog, UVM methodology, or high-level synthesis (HLS).