Engineer, DDEG Design Methodology

Role Overview

Key Responsibilities

• Contribute to verification activities for DRAM design and new product opportunities.
• Use AI-based tools, agentic workflows, and automation frameworks to accelerate verification cycle time.
• Assist with test cases, testbenches, and other components required for DRAM design verification.
• Improve debug efficiency across simulation and silicon learning loops.
• Simulate, analyze, and debug pre-silicon block-level and full-chip designs.
• Develop test cases and stimulus to increase functional coverage for DRAM and emerging memory architectures.
• Develop and maintain testbenches and test vectors using simulation tools.
• Run regressions and improve coverage analysis using agentic AI flows.
• Co-work with international colleagues on verification flows for DRAM and emerging memory designs.
• Participate in developing verification methodologies and environments for advanced memory products.

Required Qualifications

• Analytical capability for complex gate-level circuit designs is required.