Digital Verification Engineer

Responsibilities

• Develop robust verification plans for complex digital and mixed-signal optical chip designs.
• Collaborate closely with architects, designers, and customers to understand logic requirements, translate them into verification strategies, and deliver clear, actionable feedback throughout the development process.
• Perform netlist-level simulations with SDF back-annotation for timing-accurate verification
• Support FPGA/ASIC bring-up and post-silicon validation as needed
• Develop, maintain, and optimize testbenches and verification components using advanced SystemVerilog features, such as constrained random testing, assertions, and transaction-level modeling, to create robust coverage-driven environments.
• Design scalable, reusable UVM-based environments and components (e.g., agents, monitors, scoreboards) for block- and system-level verification. Employ UVM to achieve regression automation, functional coverage closure, and high bug-detection efficiency.
• Develop and execute verification strategies for digital blocks implementing or interfacing with PCI Express (PCIe). Apply protocol-checking, compliance validation, error injection, and debug skills for PCIe endpoints and root complex devices. Use protocol analyzers and simulation environments to validate correct implementation across all protocol layers.
• Participate in the verification of RISC-V CPU cores and subsystems. Create test plans targeting processor modules (ALU, decoder, register file, control logic), with reference model comparisons, signature checks, and coverage of edge-case scenarios. Leverage formal verification and compliance suites for thorough design validation.
• Plan and perform end-to-end ASIC verification, from block-level testbenches to full-chip integration. Execute functional and regression tests, formal verification, and coverage analysis. Debug and resolve design issues, ensuring pre-silicon reliability before manufacturing. Engage in design reviews and system-level protocol validation with cross-functional teams.

Desired attributes

Pay and benefits

• Competitive cash compensation, with final package based on location, experience, and the pay of team members in similar positions.
• Meaningful stock option plan offered at the earliest stage of the company (included in the majority of full time offers).
• Relocation bonus and coverage of moving expenses for relocation within 20 minutes of the company’s location.
• Healthcare coverage (including family-friendly options), pension contributions, professional development support, and 25 days of PTO, in addition to public holidays.
• Ownership of a key technical domain, with significant vertical and/or horizontal growth opportunities, based on performance and individual drive.
• A high-paced, multicultural (with 10 nationalities), and engineering-led environment.