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Key skills for this role
You will be part of the groundbreaking "Layout Methodology" team with a charter to speed up layout creation, productivity and improve time to market of Nvidia digital IP like SRAM layouts and other custom Analog layout blocks.
Be the first to conduct an in-depth study of new technology and enable the rest of the design teams to seamlessly start off on new/advanced layout technology.
Responsible for creating digital IP to enable layout work in new technology: PCELL creation, SRAM leaf cells, Productivity Scripts.
Coordinate analysis of new technology and translating into guidelines for EMIR, DFM, SRAM layout guidelines etc.
Investigate next generation tools for layout creation.
Investigate the applications of Machine Learning / Deep Learning / LLM techniques for layout creation.
BE/M-Tech in Electrical & Electronics or equivalent experience.
5+ years of experience.
Proven project cycle and tape out experience in SRAM/Analog layout design.
Experience in advanced technology nodes like 5,3 or 2 nanometers is a must.
Solid proficiency / expertise in the Cadence SKILL language is a requirement for this job.
Experience with PCELL development is a big requirement.
Solid scripting skills in Python, Perl, Shell is a requirement.
Good social skills and be an excellent teammate.
Excellent presentation and influencing skills and ability to communicate new ideas/tools to other groups.
We are an equal opportunity employer and value diversity at our company. With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our elite engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you.
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