ASIC CAD Engineer, Clocks Methodology

Own the validation of clocking methodology solutions for hardware clocking designs across multiple product lines.

Understand design requirements and develop robust validation strategies, automation, quality checks, debug infrastructure, bug fixes, and productization workflows.

Solve complex engineering problems by developing scalable methodology and automation solutions that work across multiple chip architectures.

Develop and maintain tools using C++, Python, Perl, Tcl, and NVIDIA's internal compilers, frameworks, and CAD infrastructure.

Partner closely with design, verification, architecture, and methodology teams to understand requirements and deliver high-quality tool capabilities.

Collaborate with Quality Assurance engineers to ensure robust, production-ready methodology releases.

Work effectively with engineering teams across multiple geographies and time zones.

BS or MS in Computer Science, Electrical Engineering, or a related field (or equivalent industry experience).

1+ years of experience and strong understanding of digital logic design and computer architecture.

Solid software engineering skills with expertise in C/C++ and scripting languages such as Python, Perl, and Tcl.

Experience developing CAD tools, engineering automation, or software infrastructure.

Understanding of algorithms, data structures, and software design principles.

Ability to work collaboratively across multiple engineering disciplines.

Strong problem-solving skills and the ability to independently drive technical solutions.

Experience building tools for hardware engineering teams is highly desirable.

Exposure to VLSI design flows, clocking methodologies, or physical design is a plus.