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The Role and Impact Join Intel's cutting-edge mixed-signal IP development team as a Senior Mixed Signal Design Engineer.
This role combines analog circuit design expertise with specialized focus on static timing analysis for next-generation mixed-signal systems.
You'll drive timing closure across analog-digital interfaces while supporting comprehensive design verification activities that directly impact Intel's industry-leading products.
Working in a collaborative environment with analog designers and system architects, you'll leverage tools like Cadence ADE to execute simulations, debug complex testbenches, and optimize circuit performance.
This position offers significant opportunities to enhance verification methodologies and contribute to behavioral modeling initiatives that accelerate silicon success.
If you are passionate about analog circuit design combined with mixed-signal verification (especially static timing analysis), and you thrive in a fast-paced, collaborative setting, we encourage you to apply.
The Role and Impact Join Intel's cutting-edge mixed-signal IP development team as a Senior Mixed Signal Design Engineer. This role combines analog circuit design expertise with specialized focus on static timing analysis for next-generation mixed-signal systems. You'll drive timing closure across analog-digital interfaces while supporting comprehensive design verification activities that directly impact Intel's industry-leading products.
Working in a collaborative environment with analog designers and system architects, you'll leverage tools like Cadence ADE to execute simulations, debug complex testbenches, and optimize circuit performance. This position offers significant opportunities to enhance verification methodologies and contribute to behavioral modeling initiatives that accelerate silicon success.
If you are passionate about analog circuit design combined with mixed-signal verification (especially static timing analysis), and you thrive in a fast-paced, collaborative setting, we encourage you to apply.
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Lead static timing analysis (STA) execution for mixed-signal designs, ensuring robust timing closure across analog-digital interfaces
Drive timing optimization and constraint development for complex mixed-signal systems
Execute analog circuit design tasks including simulation setup, testbench development, and schematic optimization using Cadence ADE
Perform comprehensive mixed-signal verification encompassing analog simulations, behavioral modeling, and timing analysis
Analyze simulation results for power, performance, and reliability compliance
I nvestigate and resolve complex issues in analog testbenches and mixed-signal simulations
Root-cause analysis of pre-silicon design challenges with systematic corrective action implementation
Collaborate across disciplines with analog designers, digital architects, RTL teams, and physical design engineers
Develop behavioral models to improve simulation accuracy and efficiency
Advance verification flows and methodologies supporting evolving mixed-signal design requirements
Contribute to automation initiatives using scripting and emerging AI technologies
Strong analytical and problem-solving skills, alongside effective team collaboration capabilities .
Good communication skil l s
Annual Salary Range for jobs which could be performed in Canada
Intel is committed to a culture of accessibility. Intel provides accommodations to applicants and employees with disabilities. Find information and request accommodation here .
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Design and manufacture of semiconductors and computing technology.
Visit company websiteJobs and hiring trendsCAD 129740-183170 yearly / year
Full-time
Senior · 2+ years experience
Remote
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