Analog IC Design Engineer

Responsibilities:

• Work closely with the Design Lead to support chip development and take ownership of key analogue subsystems within larger IC programmes (20%).
• Deliver circuit and block-level analogue designs that meet performance, power, area, and reliability specifications defined by Product Definition and Marketing teams (20%).
• Collaborate closely with Layout Engineering teams to ensure post-layout performance alignment, including parasitic awareness and design optimisation (15%).
• Support end-to-end verification activities, ensuring simulated performance correlates with lab measurements during validation and bring-up phases (10%).
• Work cross-functionally with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to ensure design alignment with system requirements (10%).
• Contribute to innovative circuit solutions and continuous improvement of analogue design methodologies and architectures (10%).
• Communicate and present technical work clearly and effectively to internal engineering teams and wider project stakeholders (10%).
• Support design reviews and contribute to technical discussions, ensuring high-quality engineering outputs and adherence to programme schedules (5%).

Minimum Qualifications:

• Bachelor’s degree in Electrical Engineering or related technical discipline required
• 0–2 years of relevant industry experience in Analog IC design required
• Strong understanding of CMOS/BiCMOS analog circuit design principles and semiconductor device physics
• Good technical grounding in circuit theory, device behaviour, and design trade-offs (performance, power, area)
• Experience using Cadence design and simulation tools
• Strong written and verbal communication skills in English

Desired Qualifications:

• Master’s degree (MSc) or specialised analog IC design training preferred
• Exposure to RF / high-speed analog design (10GHz+) preferred
• Experience with Laser Driver and/or TIA circuit design preferred
• Understanding of RF/analog layout principles including floorplanning, parasitics, matching, ESD, crosstalk, and IR drop
• Exposure to high-frequency passive design (e.g. inductors, T-coils) and 3D modelling techniques
• Knowledge of device modelling (Verilog-AMS, SystemVerilog or equivalent)
• Understanding of DFM, yield optimisation, and semiconductor reliability principles

Important Qualities:

Career Growth Philosophy:

Additional Notes: