Test Development Senior Engineer

Key Responsibilities

• Test Program & Solution Development: Takes ownership of the entire test solution development process, from initial concept to implementation.
• Test Plan Development: Creating comprehensive test plans to cover all aspects of the chip's functionality.
• Sound knowledge on Digital, Mixed signal, RF test methodologies. Experience in developing the test programs in ATE environment for Digital, mixed signal, RF devices.
• Device debug for Digital, Mixed Signal, RF devices using ATE tools and verify with bench Test results.
• Experience in bring-up and debug of PMIC (Buck Converter, Active clamp flyback Controller), Data Converters (ADC).
• Designed test sequences to measure input offset voltage, bias current, and output voltage levels using precision sourcing and measurement instruments.
• Responsible for working with different teams for understanding the device datasheet and come up with a detailed Test procedure/plan to test the chip in ATE environment.
• Expertise in ADC dynamic parameters debug like INL, DNL, SNR, THD.
• Strong working experience in Teradyne test systems like ETS (364/88/800), Ultra Flex, J750, Magnum, Advantest V93K systems or any other ATE Tester.
• Build ATE hardware design (load board & probe card), PCB design tools and Signal Integrity analysis.
• Need to interact with the PCB design team for developing the necessary hardware – Test load board, bench board and probe cards.
• Knowledge on Device Characterization, testing at different temperatures.
• Knowledge on data extraction tool like Perl, Python will be added advantage.
• Performance Optimization: Improves testing processes and methodologies to ensure efficient and cost-effective testing.
• Documentation: Creates and maintains test documentation, including test plans, specifications, and procedures.
• Collaboration: Works closely with cross-functional teams, including design, manufacturing, and quality assurance, to ensure seamless integration and testing of ICs.
• Test Execution: Running tests on the manufactured silicon, including both pre-silicon (emulation) and post-silicon platforms.
• Expertise in High Speed Serdes Interface characterization and protocol compliance testing such as PCIe/Ethernet/SDI/Coa Xpress/JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB and DisplayPort/HDMI etc.