SPE Applications/Validation Engineering at Rambus — San Jose, USA | Base Career

Full Job Posting

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr Principal Applications Engineer with DRAM and failure analysis expertise to analyze and debug complex technical issues involving DRAM, memory interface chips, DIMM, server and BIOS operation and interaction.

This individual will support international customers of Rambus DDR4 and DDR5 memory interface chips in South Korea and Asia.

You will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

Rambus offers a flexible work environment, embracing a hybrid approach for the majority of our office-based roles.

We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Analyze and debug complex technical issues involving server memory and manage customer issues to a satisfactory conclusion.
Support technical qualification of new chip designs to secure customer design wins.
Assist with validation and debug of new memory interface chips for DDR5 servers.
Collect and analyze signal integrity data at the system level.
Conduct failure analysis and prepare failure analysis and 8D reports.
Gather customer technical feedback and communicate to Marketing and Engineering teams.
Present technical updates to customers and company management in writing and verbally via quality presentations.
Prepare technical documentation such as datasheets, user guides and application notes.
Familiar with DDR4/DDR5 DIMM memory operation in Intel, AMD, and/or OEM servers.
Good understanding of signal integrity issues at clock rates of 3 GHz and above.
Experience with power management and I2C/I3C serial interfaces.
Extensive experience with probing, using high speed oscilloscopes and other lab equipment.
History of using fundamental root cause techniques (fishbone, design of experiments, etc.) to solve complex problems.
Good understanding of ATE tester operation is a strong plus.
Past experience reading and modifying MRC BIOS code and utilizing server platform debug tools (either Intel or AMD) is strongly desired.
Ability to use scripting languages such as Perl, Tcl or Python to analyze data log text files and automate system and bench testing.

Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing.

With over 30 years of semiconductor experience, we are a leading provider of high-performance products and innovations that maximize the bandwidth, capacity and security for AI and other data-intensive workloads.

Our world-class team is the foundation of our company, and our innovative spirit drives us to develop the cutting-edge products and technologies essential for tomorrow’s systems.

The US salary range for this full-time position is $157,600to $292,600.

Our salary ranges are determined by role, level and location.

The successful candidate’s starting pay will be determined based on job-related skills, experience, qualifications, work location and market conditions.

Rambus offers a competitive compensation package, including base salary, bonus, equity and employee benefits.

Rambus is committed to cultivating a culture where we actively seek to understand, respect, and celebrate the complex and rich identities of ourselves and others.

Our Diversity, Equity, and Inclusion initiatives are geared towards valuing the differences in backgrounds, experiences, and thoughts at Rambus to help enhance collaboration, teamwork, engagement, and innovation.

At Rambus, we believe that we can be our best when every member of our organization feels respected, included, and heard.

Rambus is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender identity, gender expression, age, status as a protected veteran, status as an individual with a disability, genetic information, or other applicable legally protected characteristics.

Rambus is committed to providing reasonable accommodations for qualified individuals with disabilities and disabled veterans during our job application procedures.

If you require assistance or an accommodation due to a disability, please feel free to inform us in your application.

Rambus does not accept unsolicited resumes from headhunters, recruitment agencies or fee-based recruitment services.

For more information about Rambus, visit rambus.com.

For additional information on life at Rambus and our current openings, check out rambus.com/careers/ .

#LI-GL1

#LIF-GL

#hybrid

SPE Applications/Validation Engineering

Job Fit Check

Key Skills for This Role

Full Job Posting

Apply for this job in 1 click

More jobs at Rambus

Lead Facilities Administrator

MTS Verification Engineering

Lead Digital Design Engineer, # 1048 (Agoura Hills, CA)

Analog Design Engineer, #1217 (San Jose, CA)

Sr Principal Logic Design Engineer, #1221 (San Jose, CA)

Principal Analog/Mixed-Signal Design Engineer (PE Analog Engineering) #1218

Director/Sr Manager - Silicon IP Sales

Principal Field Applications Engineer