Signal Integrity Senior Engineer

Upscale AI is building the high-performance infrastructure powering the next generation of artificial intelligence.

Backed by over $300M in funding and rapid global adoption, we are scaling systems designed for the world’s most demanding AI workloads.

We focus on first-principles engineering across silicon, systems, and networking—where performance, scale, and execution are critical.

Our team is talent-dense and high-performing.

We value ownership, technical rigor, and speed, and we offer the opportunity to work on foundational problems with immediate, real-world impact.

If you’re looking to do high-impact work, move fast, and help define the infrastructure behind the future of AI—Upscale AI is where you can produce meaningful work at the frontier—and operate at a high standard.

• Lead Signal Integrity and Power Integrity analysis for complex PCB and system designs. - Define SI/PI architecture, design rules, and channel budgets for high-speed interfaces. - Perform detailed channel simulations and optimization using industry-standard tools. - Drive correlation between simulation and laboratory measurements. - Develop and validate models for packages, PCBs, connectors, cables, and complete channels. - Conduct pre-layout and post-layout SI/PI analysis. - Perform compliance and interoperability analysis for industry standards. - Debug complex signal integrity issues and drive root-cause resolution. - Define PCB stackups, routing requirements, via structures, and return path strategies. - Mentor junior engineers and provide technical leadership across projects. - Collaborate with silicon, package, board, mechanical, and manufacturing teams. - Interface with vendors and customers on SI/PI-related technical topics.

Required Qualifications: - BS/MS in Electrical Engineering or related field. - 5+ years of experience in Signal Integrity, High-Speed Design, or related areas.

Strong understanding of: - Signal Integrity and Power Integrity principles - Electromagnetic theory - Transmission line analysis - High-speed SerDes architectures - PCB and package design - Channel compliance methodologies

Extensive hands-on experience with: - Ansys HFSS - Cadence Clarity - Cadence Sigrity - Keysight ADS Strong laboratory experience with: - Vector Network Analyzer (VNA) - TDR/TDT systems - High-bandwidth oscilloscopes - De-embedding and calibration techniques Experience analyzing: PCB channels, Connectors, Cables, Packages, Backplanes and midplanes Ability to correlate simulations with measured results and drive design improvements.

Preferred Qualifications: - Experience with 112G/224G PAM4 SerDes systems. - Experience with Ethernet, PCIe, UCIe, CXL, DDR, or AI networking products. - Knowledge of COM, ERL, eye analysis, jitter decomposition, and channel compliance methodologies. - Experience with Python, MATLAB, or automation frameworks. - Experience leading SI strategy for large-scale hardware programs.

Desired Attributes: - Strong technical leadership and mentoring skills. - Excellent cross-functional communication. - Ability to drive projects independently from concept through production. - Customer-facing and vendor collaboration experience. - Passion for solving challenging high-speed design pro

Where you fall within that range depends on your experience, skills, and impact—we benchmark against internal levels to keep things fair and consistent.

Upscale AI is building a team that reflects a wide range of perspectives, backgrounds, and experiences.

We’re proud to be an Equal Opportunity Employer and consider all qualified applicants regardless of race, color, religion, national origin, sex, sexual orientation, gender identity, disability, or veteran status.

We’re committed to making our hiring process accessible to everyone.

If you need accommodations at any stage, just reach out to us at hiring@upscaleai.com —we’re happy to help.

Note: This inbox is only for accommodation requests.