Senior Virtual Platform Functional Modeling Engineer

• Collaborate with firmware, software, validation, and emulation teams to enhance virtual platform capabilities and enable complex workload execution.
• Define and implement inter-node communication behavior within distributed simulation environments, including message ordering, flow control, protocol state machines, and error handling mechanisms.
• Design and improve simulation orchestration services, including job scheduling, synchronization, logging, replay, and deterministic execution capabilities.
• Develop model interfaces, adapters, communication frameworks, and platform assembly methodologies that enable scalable system integration.
• Create validation strategies, regression suites, debug infrastructure, trace capabilities, and CI/CD automation to ensure model quality and reliability.
• Partner with architecture, firmware, software, and system validation teams to align virtual platform functionality with product and platform requirements.
• Evaluate commercial, open-source, and internally developed technologies that improve modeling productivity and platform scalability.
• Contribute to technical documentation, knowledge sharing, training, and engagement with industry partners and open-source communities.

• Functional modeling, virtual platform development, simulation frameworks, firmware enablement, or pre-silicon modeling environments.
• Experience using AI-assisted development tools to design, debug, optimize, and maintain complex software frameworks and models.
• Strong C++ software development skills within modeling, systems software, firmware infrastructure, or platform-level environments.
• Experience developing, integrating, or validating functional models, device models, virtual platforms, or modeling APIs.
• Knowledge of test planning, regression infrastructure, validation methodologies, and CI/CD automation.
• Understanding of SoC and platform architecture, including memory hierarchies, coherency mechanisms, CPU/GPU compute architectures, firmware-visible devices, and high-speed interconnects.
• Familiarity with industry protocols and interconnect technologies such as PCIe, CXL, AXI, CHI, ACE, UCIe, HBM, DDR, or related coherency fabrics.
• Experience translating architecture specifications into executable models and validation-ready platform behavior.
• Exposure to virtual platform technologies such as SystemC/TLM-2.0, Arm Fast Models, Simics, QEMU, or similar frameworks.
• Experience with virtual platform validation, platform bring-up, protocol testing, fault injection, or hardware/software co-validation.
• Familiarity with large-scale infrastructure environments, including cloud-based and distributed compute platforms.
• Experience establishing reusable modeling methodologies, APIs, debug capabilities, configuration frameworks, or regression automation standards.

• Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field preferred.
• Master's degree preferred.

This role is not eligible for visa sponsorship.

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Benefits offered are described: AMD benefits at a glance .

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.