Senior Verification Engineer / Lead Verification Engineer

· Experience with Git, regression automation, and CI/CD workflows.

Emulation & FPGA Prototyping

· Hands-on experience with Siemens Veloce/Veloce TBX, Cadence Zebu, Palladium, or equivalent emulation platforms.

· Familiarity with SCE-MI, DPI-C, transaction-based acceleration, hybrid verification flows, software-driven validation, and co-emulation methodologies.

· Experience with Xilinx FPGA prototyping and validation flows, including familiarity with AMD/Xilinx UltraScale+ and Versal architectures and Vivado tools.

Protocol Knowledge

· Experience verifying and debugging one or more industry-standard protocols including LPDDR5/LPDDR5X/LPDDR6, PCIe, Ethernet, USB, UART, I2C/I3C, MIPI C-PHY/D-PHY, AXI, AHB, and APB.

Preferred Qualifications

· Experience with large-scale SoC verification, emulation, and FPGA prototyping.

· Familiarity with AI-assisted verification and design methodologies.

· Experience with software bring-up, system-level validation, and post-silicon debug.

· Exposure to automation frameworks and AI/Generative AI-based verification productivity tools.

Soft Skills

· Strong analytical and problem-solving skills with the ability to debug complex system issues.

· Excellent communication and collaboration skills in a cross-functional environment.

· Self-motivated, proactive, and capable of working independently with minimal supervision.

· Ability to lead technical discussions, influence decisions, and mentor engineers.

· Strong ownership, accountability, and commitment to quality and execution.

Minimum Qualifications:

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