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Senior Technical Lead - Post Silicon Validation (US)
HCL Technologies
USA
Senior
Discovered 2 weeks ago
bashcpluspluslinuxpython
Free
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Role Overview
You will be responsible for developing, executing, and maintaining tests for collective communication operations (AllReduce, AllGather, ReduceScatter, AllToAll) on custom networking silicon — validating that the ASIC correctly enables large-scale distributed AI training workloads.
Key Skills for This Role
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Job Summary
You will be responsible for developing, executing, and maintaining tests for collective communication operations (AllReduce, AllGather, ReduceScatter, AllToAll) on custom networking silicon — validating that the ASIC correctly enables large-scale distributed AI training workloads.
Programming Languages
Language
Proficiency
Usage
C/C++
Expert (Must-have)
Writing test frameworks, RDMA verbs test suites, driver-level test development, loopback and traffic tests
Python
Strong (Must-have)
Test automation, CI/CD integration, orchestration of multi-node test scenarios, emulation test infrastructure
Bash/Shell Scripting
Proficient (Good-to-have)
Test execution scripts, environment setup, multi-host coordination
Key Responsibilities
Develop test suites for collective operations (AllReduce, AllGather, ReduceScatter, AllToAll) targeting Trantor ASIC across emulation, FPGA, and silicon platforms
Write RDMA verbs-level tests using the RoCE Verbs Testing Framework (rdma-core Verbs API) — covering positive, negative, and error-injection scenarios
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