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Senior Staff Digital Verification Engineer
Renesas Electronics
Duluth, USA
Full-time
Mid-Senior
Onsite
Discovered 1 weeks ago
digital verificationDDR5 and DDR6 memory interfacesUVM methodologyverification planningverification testbenchesfunctional and performance verification
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digital verificationDDR5 and DDR6 memory interfacesUVM methodology
Role Overview
Develop digital verification for leading-edge memory data buffer chips used in data centers, AI computing, and cloud computing.
The products support DDR5, DDR6, and future high-bandwidth, low-power memory interface applications.
Key Skills for This Role
digital verificationDDR5 and DDR6 memory interfacesUVM methodologyverification planningverification testbenchesfunctional and performance verification
Full Job Posting
Role Overview
Develop digital verification for leading-edge memory data buffer chips used in data centers, AI computing, and cloud computing.
The products support DDR5, DDR6, and future high-bandwidth, low-power memory interface applications.
Core Responsibilities
- Verify DDR6 data buffer designs against functional and performance specifications.
- Drive verification strategy, test plans, coverage, and test execution for memory interface products.
- Integrate and test verification environments at system and block level using UVM methodology.
- Develop reusable verification environments, testbench structures, tests, coverage models, and checkers.
- Optimize UVM-based testbenches for reusability, performance, and ease of use.
- Own verification environments for assigned blocks and tools as an expert user.
- Work with design teams to ensure designs meet requirements and are testable.
- Drive verification process improvements and monitor design verification coverage.
- Participate in feasibility studies and report verification status to management.
Qualifications
- Master's degree in Electrical Engineering, Computer Engineering, or equivalent with 7+ years of experience, or bachelor's degree with 9+ years of experience.
- Experience with system-level and block-level verification using UVM.
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