Senior Solution Architect (IN)

assigned projects, considering factors like performance, power, and area

Perform floorplanning, placement, clock tree synthesis (CTS), and routing for complex digital circuits

Ensure adherence to design rules and manufacturability guidelines

Utilize physical design tools and methodologies (place and route tools, static timing analysis tools) to achieve timing closure and optimal physical design

Collaborate with design, verification, and layout teams to ensure seamless integration throughout the design flow

Participate in design reviews and provide technical leadership on physical design aspects

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field (Master's degree a plus)

solid experience in physical design of ASICs or SoCs

Proven track record of leading and mentoring a physical design team to successful tapeouts

In-depth knowledge of physical design methodologies (floorplanning, placement, routing, CTS, static timing analysis)

Expertise in industry-standard physical design tools (place and route tools, static timing analysis tools)