Senior Solution Architect (IN)

A PDK (Process Design Kit) Development Lead manages the creation, verification, and deployment of software packages used by integrated circuit designers to build and verify chips for specific semiconductor manufacturing processes.

Define PDK Scope: Lead the technical definition, requirements, and roadmaps for PDK content across technology nodes.

Manage PDK Components: Oversee development of parameterized cells (PCells), symbols, and verification rule decks (DRC, LVS, RC Extraction) using EDA tools like Cadence, Synopsys, or Siemens Calibre.

Bridge Teams: Act as the primary technical interface between process technology development, design teams, and external EDA vendors.

Quality Assurance: Drive QA flows, automation scripts, and validation methodologies to ensure error-free tape-outs.

Customer Support: Provide expert technical support and documentation for internal design teams or external foundry customers.

Education: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.

Experience: 15 plus years in semiconductor design, custom flows, or foundry PDK development, with leadership experience.

Technical Skills: Proficiency in Cadence Virtuoso, Skill scripting, Python, Perl, UNIX shell scripting, and physical verification tools (Calibre, Pegasus, ICV).