Senior Signal Integrity Engineer, Platforms

Responsibilities

• Support System Signal Integrity (SI) design on data center hardware products.
• Collaborate with board, chip and system engineers, design partners, and chip vendors to support system SI design, explore layout and manufacturability tradeoffs, and ensure that product functions as required.
• Support Application-Specific Integrated Circuit (ASIC), package, board, connector, and cable vendors to develop new interconnect technologies.
• Participate in system interconnects bring up and qualification, work with test engineers and include configuring chips to ensure adequate margin.
• Collaborate with design engineers, Printed Circuit Board (PCB) designers, and system teams to help solve SI issues.
• - Support System Signal Integrity (SI) design on data center hardware products. - Collaborate with board, chip and system engineers, design partners, and chip vendors to support system SI design, explore layout and manufacturability tradeoffs, and ensure that product functions as required. - Support Application-Specific Integrated Circuit (ASIC), package, board, connector, and cable vendors to develop new interconnect technologies. - Participate in system interconnects bring up and qualification, work with test engineers and include configuring chips to ensure adequate margin. - Collaborate with design engineers, Printed Circuit Board (PCB) designers, and system teams to help solve SI issues.

Minimum qualifications:

Preferred qualifications:

Qualifications

• Minimum qualifications: - Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. - 4 years of experience working in a signal integrity technical environment, or 3 years of experience with an advanced degree. Preferred qualifications: - Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field. - 1 year of experience in technical leadership. - Experience with the product development process for mass volume production design, with a focus on signal integrity, power integrity and lab validation. - Experience with PCIE, DDR, SATA, ethernet standards, PCB, connector, or cable design and assembly processes, including materials and component selection. - Experience with Allegro, HFSS, SIwave, ADS, MATLAB, PowerDC, PowerSI, and scripting for data collection and analysis (e.g., Python, Bash). Experience in a lab environment with Serializer/Deserializer (SerDes) testing and understanding of SerDes capabilities.