Senior RTL Design Engineer

Requirements:

• 8+ yrs of recent industry experience in high-performance, energy-efficient CPU designs. • Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode; branch prediction; register renaming and instruction scheduling; scalar and/or vector execution units; load-store unit; cache and memory subsystems. • Knowledge of RISC-V architecture is a plus. • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL. • Experience with Scala and/or Chisel is a plus. • Attention to detail and a focus on high-quality design. • Ability to work well with others and a belief that engineering is a team sport. • Knowledge of at least one object-oriented and/or functional programming language. • Background of successful CPU development from architecture through tapeout.
• MS/ PhD degree in EE, CE, CS or a related technical discipline, or equivalent experience.
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