greenhouse
Senior Processor Architect
Fractile
London, GBR
Full-time
Senior
Hybrid
Discovered 2 weeks ago
gem5SystemC
Free
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Key Skills for This Role
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Key Responsibilities
- Define and own the compute engine architecture specifications, balancing performance, flexibility, power, area, and design complexity.
- Lead architectural exploration from early concept through to specification, coordinating with modelling, implementation, verification, and physical design teams.
- Specify execution units, memory hierarchy, instruction sets and flow — making principled trade-offs at every level.
- Help build and maintain performance models and simulators to guide architectural decisions with data.
- Partner with the system architecture and software/modelling teams to ensure the processor delivers real-world application performance, not just benchmark wins.
- Evaluate emerging techniques — compact number formats, novel compute paradigms, advanced packaging options — to inform the architectural roadmap.
- Act as a technical mentor, raising the bar for rigour in performance analysis and architectural documentation across the team.
- Represent compute engine architecture in technical reviews, partner discussions, and customer engagements.
Skills & Experience
- Proven experience as a Processor Architect, CPU/GPU Architect, or similar role in semiconductor or high-performance computing domains.
- Deep understanding of compute engine and processor architecture and design, including matrix and vector centric floating-point arithmetic and memory hierarchies.
- Strong grasp of RTL design flows and physical design constraints and how they feed back into architectural choices.
- Experience taking processor designs from early exploration through to tapeout and post-silicon performance characterisation.
- Demonstrated ability to define and manage performance and power budgets and navigate complex trade-offs.
- Comfortable working across many disciplines, including architecture, modelling, implementation, verification, and software.
- Excellent communicator who can bridge architectural depth with system-level and product-level context.
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