Senior IP Design Engineer

Main Requirements and Qualifications

• Educational Background: Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related field, or equivalent experience.
• Industrial Experience: 5+ years of working experience in RTL design
• Digital Design Knowledge: Working knowledge of digital circuit design including but not limited to FSM, register file, memory system, bus handshake protocol, and algorithmic logic unit.
• Architectural Modeling and RTL Coding Skill: Proficiency in SystemVerilog coding is required, along with working knowledge of design synthesis, power, performance, and area trade-offs.
• Communication and Teamwork: Strong communication, presentation, and teamwork skills.
• EDA Tool Proficiency: Familiarity with industry-standard EDA tools for RTL design simulation and quality check flows.
• Scripting Languages: Knowledge of coding agents like Claude is a plus
• Location: Austin, TX (preferred) or San Diego, CA
• Salary range: $128,600-$203,600 (depends on the location)
• Employee may be eligible for performance bonus, short- and long-term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Sick Leave, Vacation time, Parental leave, 401K and more.
• MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation.
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