Senior FPGA Modem Engineer

Responsibilities

• Own one or more FPGA-based modem chains through all development phases, from micro-architecture through to lab deployment.
• Define the micro-architecture of high-rate FPGA modem blocks and surrounding digital infrastructure. Implement designs using SystemVerilog or Verilog.
• Develop block-level and end-to-end self-checking hardware verification environments using golden reference models provided by the modem systems team.
• Develop FPGA synthesis and place and route build scripts including timing and placement constraints. Analyze results and implement design changes required to close timing and meet system-level FPGA power and resource requirements.
• Define and implement clean hardware/software interfaces, including registers, configuration, telemetry, fault and status signaling, and test hooks.
• Conduct code and design reviews and participate in multi-functional reviews.
• Collaborate with systems architects, HW engineering design teams and FW/SW design teams for lab bring-up of boards combining FPGA, firmware, RF, and Networking functions.
• Mentor junior engineers and provide technical leadership on FPGA best practices.

Basic Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related STEM field.
• A minimum of 10+ years experience in design, development and implementation of wireless baseband modems using FPGA devices. Equivalent experience in ASIC modem design will also receive consideration.
• Proficiency in one or more HDL programming languages such as VHDL, Verilog, or SystemVerilog.
• Experience writing verification frameworks using SystemVerilog/UVM, Cocotb or transactional-level modeling.
• Thorough knowledge of modern FPGA architecture including experience with advanced floorplanning clock-domain crossing (CDC) analysis, false-path isolation, and timing closure techniques . Experience using these techniques with AMD UltraScale+ and Versal FPGA families is highly preferred.
• Deep understanding of Digital Front End (DFE) architectures, including digital up/down conversion (DUC/DDC), interpolation/decimation filters, and interfacing with high-speed ADCs and DACs.
• Experience with industry-standard bus interfaces such as AXI and AXI-streaming and high-speed interfaces such as DDR4/5, 10/40/100 Gb Ethernet and SERDES interfaces like JESD-204B/C, Aurora and Interlaken.
• Experience with FPGA toolchains and workflows such as AMD Vivado, including simulation, synthesis, place-and-route, timing analysis and closure as well as power analysis.
• Experience debugging FPGA or digital hardware in the lab using oscilloscopes, logic analyzers, spectrum analyzers, time-interval measurement tools, or similar instrumentation.
• Experience working with embedded software design, especially in complex debugging of FPGA on-target SW/HW interaction.
• Familiarity with Linux-based development environments, Git, and automated testing.
• Strong written and verbal communication and interpersonal skills. Ability to prioritize work, complete multiple tasks and work under deadlines with minimal supervision.

Preferred Qualifications

• Experience implementing both the MAC and PHY layers of a wireless modem such as 5G OFDMA or Single-Carrier DVB-S2(X) through the entire product life cycle for an FPGA or ASIC target.
• Experience with space, defense, or other reliability-critical electronics, including radiation-tolerant design, Triple Modular Redundancy (TMR), and single-event upset (SEU) mitigation techniques.
• Experience with embedded firmware or low-level software for device control, board bring-up, telemetry, and calibration workflows.
• Experience with board-level digital or mixed-signal hardware design, schematic review, clock-tree or oscillator circuitry and hardware bring-up.
• Experience writing tests and automation scripts using C, C++ or Python.
• Experience designing HW accelerators tightly coupled with the embedded processor subsystems present in most modern FPGA devices.
• Experience with the architecture, toolchains and programming of SIMD vector DSP engines for wireless modem applications.
• Even if you don’t meet every qualification, we encourage you to apply. We value strong fundamentals, sound judgment, and growth potential, and we know great candidates do not always match every item on a job description.

Additional Information